Experienced AMS Physical Design Engineer

Company:  Apple Inc.
Location: München
Closing Date: 24/10/2024
Job Requirements / Description

Senior Physical Design Engineer for Advanced Mixed-Signal ICs

At Apple, we strive to create innovative products that revolutionize people's lives. We're seeking a highly skilled Physical Design Engineer to join our team in Munich. As a key member of our multidisciplinary group, you will have the opportunity to design and develop cutting-edge products that will captivate millions of Apple's customers worldwide.

Key Responsibilities

We're looking for a talented engineer who can excel in the following areas:

  1. Perform static timing analysis for high-speed IP's, including analog mixed-signal interfaces.
  2. Set up and optimize CTS for high-frequency, multiple clocks networks.
  3. Develop floor-plans under strong area constraints, ensuring optimal integration for full chip implementation.
  4. Account for and optimize low power throughout every implementation step.
  5. Execute full place and route flow on hierarchical design blocks, meeting all design targets for timing, area, and power within a challenging project timeline.
  6. Implement functional, timing, noise, EMIR, etc. ECOs.
  7. Run various physical design verification tasks, providing feedback to hard macro owners and other involved teams, and perform design reviews.
  8. Participate in physical design methodologies meetings.
  9. Contribute to the development of our AMS flow to further enhance our best-in-class environment.

Requirements

  • Proven knowledge and hands-on experience in Floor-planning, Place & Route, Physical verification, timing closure, power/functional verification.
  • Ability to fluently speak and write in English.

Preferred Qualifications

  • BSc in EE.
  • Experience in high PHY and/or SOC designs.
  • Knowledge of low power implementation for both static and dynamic, as well as UPF power intent flow.
  • Deep understanding of timing constraints, timing exceptions, clock setup, and timing debugging.
  • Proven knowledge of Basic SoC Architecture and HDL languages like Verilog.
  • Power user of industry-standard Physical Design, Static Timing Analysis & Synthesis tools.
  • Deep understanding of scripting languages such as Perl/Tcl/shell.
  • Hands-on experience in functional ECO implementation and equivalence checking and debugging.
  • Deep understanding of Physical Design Verification methodology to debug LVS/DRC issues at chip/block level.

Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.

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